SX1210I084T【PDF 49/73 页】IC SINGLE-CHIP RECEIVER 32-TQFN

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SX1210

ADVANCED COMMUNICATIONS & SENSING

6. Configuration and Status Registers

6.1. General Description

Table 21 sums-up the control and status registers of the SX1210:

Table 21: Registers List

Name

MCParam

IRQParam

RXParam

SYNCParam

Reserved

OSCParam

PKTParam

Size

13 x 8

3x8

6x8

4x8

1x8

1x8

4x8

Address

0 - 12

13 - 15

16 - 21

22 – 25

26

27

28 - 31

Description

Main parameters

Interrupt registers

Receiver parameters

Pattern

Do not change default value : “01111110”

Crystal oscillator parameters

Packet handler parameters

6.2. Main Configuration Register - MCParam

The detailed description of the MCParam register is given in Table 22.

Table 22: MCParam Register Description

Name

Bits

Address

(d)

RW

Description

Transceiver mode:

000

sleep mode - Sleep

Chip_mode

7-5

0

r/w

001

stand-by mode - Stby (d)

010

011

frequency synthesizer mode - FS

receive mode - Rx

Frequency band:

Freq_band

4-3

0

r/w

00

01

902 – 915 MHz

915 – 928 MHz (d)

10

950 – 960 MHz or 863 - 870 MHz (Application Circuit dependant)

Fine VCO trimming:

00

Vtune determined by tank inductors values (d)

VCO_trim

2-1

0

r/w

01

Vtune + 60 mV typ.

10

11

Vtune + 120 mV typ.

Vtune + 180 mV typ.

Selection between the two sets of frequency dividers of the PLL, Ri/Pi/Si

RPS_select

0

0

r/w

0

R1/P1/S1 selected(d)

1

R2/P2/S2 selected

Modulation type:

Modul_select

7-6

1

r/w

01

OOK

10

FSK (d)

Data_mode_0

5

1

r/w

Data operation mode LSB (refer to Data_Mode_1 (Bit 2 Addr 1)

OOK demodulator threshold type:

00

fixed threshold mode

OOK_thresh_type

4-3

1

r/w

01

peak mode (d)

10

11

average mode

reserved

Rev 2– Sept 8 , 2008

th

Page 49 of 73

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